
	ECE4253 Digital Communications

	Department of Electrical and Computer Engineering - University of New Brunswick, Fredericton, NB, Canada

Linear Recursive Sequence Generator

Shift registers with feedback essentially divide polynomials to create distinctive binary sequences.

This online tool draws and analyzes digital circuits which generate Linear Recursive Sequences (LRS) based on a defining polynomial P(x). The circuit shown below is traced through all possible states. Maximum length sequences are identified. The autocorrelation of each sequence can also be checked (maximum 1023 bits).

Fibonacci Implementation

alternate configuration Fibonacci

Circuit based on P(x) = x⁸+x⁷+x²+x+1

The circuit taps correspond to P(x) = (110000111).

Taps: (110000111) (prime)

Sequence #1 (Starting with 0)

States: 0 0 forever...

Sequence #2 (Starting with 1)

States: 1 128 192 224 240 248 252 126 63 159 79 167 83 41 148 74 165 210 105 180 90 173 214 235 245 250 125 62 31 143 71 163 209 104 52 154 77 38 19 9 132 66 161 80 40 20 138 69 34 145 72 36 146 73 164 82 169 84 170 85 42 149 202 101 50 153 76 166 211 233 116 186 93 46 23 139 197 226 113 184 220 110 55 155 205 230 243 249 124 190 223 111 183 91 45 22 11 5 2 129 64 32 16 8 4 130 65 160 208 232 244 122 189 222 239 119 187 221 238 247 123 61 30 15 135 67 33 144 200 228 114 185 92 174 215 107 53 26 141 198 227 241 120 60 158 207 103 179 217 108 182 219 237 246 251 253 254 255 127 191 95 175 87 171 213 234 117 58 157 206 231 115 57 156 78 39 147 201 100 178 89 172 86 43 21 10 133 194 97 176 216 236 118 59 29 14 7 131 193 96 48 24 12 134 195 225 112 56 28 142 199 99 49 152 204 102 51 25 140 70 35 17 136 196 98 177 88 44 150 203 229 242 121 188 94 47 151 75 37 18 137 68 162 81 168 212 106 181 218 109 54 27 13 6 3 1

Period = 255 (Maximum Length Sequence) (autocorrelation)
Output =
1000000011111100101001011010111110001011001000010100010010010101
0100110010111010001110110011111011010000001000001011110111011110
0001001110101100011110011011011111111010101110011100100110101000
011011100000110000111000110011000100011010011110100100010101101...

See a detailed analysis and State Table for this circuit.

Specify the taps for your sequence

Modulo 2 addition is shown schematically equivalent to Exclusive-OR gates.


2024-04-29 03:12:33 ADT Last Updated: 2014-01-13	Richard Tervo [ tervo@unb.ca ]	Back to the course homepage...