
	ECE4253 Digital Communications

	Department of Electrical and Computer Engineering - University of New Brunswick, Fredericton, NB, Canada

Linear Recursive Sequence Generator

Shift registers with feedback essentially divide polynomials to create distinctive binary sequences.

This online tool draws and analyzes digital circuits which generate Linear Recursive Sequences (LRS) based on a defining polynomial P(x). The circuit shown below is traced through all possible states. Maximum length sequences are identified. The autocorrelation of each sequence can also be checked (maximum 1023 bits).

Fibonacci Implementation

alternate configuration Fibonacci

Circuit based on P(x) = x⁸+x⁷+x⁶+x+1

The circuit taps correspond to P(x) = (111000011).

Taps: (111000011) (prime)

Sequence #1 (Starting with 0)

States: 0 0 forever...

Sequence #2 (Starting with 1)

States: 1 128 192 96 176 216 108 182 91 173 86 43 21 138 69 34 145 72 164 210 233 244 122 61 158 79 167 211 105 52 26 141 70 35 17 136 196 98 49 152 204 102 51 25 140 198 227 113 56 28 14 135 195 97 48 24 12 6 131 193 224 112 184 220 110 55 27 13 134 67 161 80 168 212 106 53 154 77 38 147 201 228 114 57 156 206 231 115 185 92 174 87 171 213 234 245 250 253 254 255 127 191 223 111 183 219 109 54 155 205 230 243 121 60 30 143 199 99 177 88 172 214 235 117 58 157 78 39 19 9 132 194 225 240 120 188 222 239 119 187 221 238 247 123 189 94 47 23 11 5 130 65 32 16 8 4 2 129 64 160 208 104 180 218 237 246 251 125 62 159 207 103 179 217 236 118 59 29 142 71 163 209 232 116 186 93 46 151 203 101 50 153 76 166 83 169 84 170 85 42 149 74 37 146 73 36 18 137 68 162 81 40 20 10 133 66 33 144 200 100 178 89 44 22 139 197 226 241 248 124 190 95 175 215 107 181 90 45 150 75 165 82 41 148 202 229 242 249 252 126 63 31 15 7 3 1

Period = 255 (Maximum Length Sequence) (autocorrelation)
Output =
1000000011011010100010010111100101100010001100110001110000110000
0111011000010101100100111001110101011111111011011001111000110101
1100100001111011101111010000010000001011011111001101110001011101
001100101010100100100010100001001101000111110101101001010011111...

See a detailed analysis and State Table for this circuit.

Specify the taps for your sequence

Modulo 2 addition is shown schematically equivalent to Exclusive-OR gates.


2024-04-28 21:55:57 ADT Last Updated: 2014-01-13	Richard Tervo [ tervo@unb.ca ]	Back to the course homepage...