
	ECE4253 Digital Communications

	Department of Electrical and Computer Engineering - University of New Brunswick, Fredericton, NB, Canada

Linear Recursive Sequence Generator

Shift registers with feedback essentially divide polynomials to create distinctive binary sequences.

This online tool draws and analyzes digital circuits which generate Linear Recursive Sequences (LRS) based on a defining polynomial P(x). The circuit shown below is traced through all possible states. Maximum length sequences are identified. The autocorrelation of each sequence can also be checked (maximum 1023 bits).

Fibonacci Implementation

alternate configuration Fibonacci

Circuit based on P(x) = x⁸+x⁷+x³+x²+1

The circuit taps correspond to P(x) = (110001101).

Taps: (110001101) (prime)

Sequence #1 (Starting with 0)

States: 0 0 forever...

Sequence #2 (Starting with 1)

States: 1 128 192 224 240 248 124 62 31 143 71 35 145 72 164 82 41 20 138 69 34 17 136 68 162 209 104 180 90 173 86 171 213 234 117 58 157 78 39 19 137 196 98 49 152 76 38 147 73 36 146 201 228 114 57 28 14 7 3 129 64 32 16 8 132 66 33 144 200 100 178 217 236 246 123 61 158 207 103 51 153 204 230 115 185 220 238 247 251 253 126 63 159 79 167 211 105 52 154 77 166 83 169 212 106 181 218 109 182 91 45 150 75 37 18 9 4 130 193 96 48 24 140 198 99 177 88 172 214 107 53 26 141 70 163 81 168 84 170 85 42 149 202 101 50 25 12 6 131 65 160 208 232 116 186 93 174 215 235 245 250 125 190 223 111 183 219 237 118 187 221 110 55 27 13 134 67 161 80 40 148 74 165 210 233 244 122 189 94 47 151 203 229 242 249 252 254 255 127 191 95 175 87 43 21 10 133 194 225 112 56 156 206 231 243 121 60 30 15 135 195 97 176 216 108 54 155 205 102 179 89 44 22 139 197 226 241 120 188 222 239 119 59 29 142 199 227 113 184 92 46 23 11 5 2 1

Period = 255 (Maximum Length Sequence) (autocorrelation)
Output =
1000000011111000100101000100010110101011100100011001001001110000
0010000100110111100110011101111110010110010101101101001000001100
0110101100010101010011000001011101011111011011101100001010010111
101001111111101010000111001111000011011001101000111101110001110...

See a detailed analysis and State Table for this circuit.

Specify the taps for your sequence

Modulo 2 addition is shown schematically equivalent to Exclusive-OR gates.


2024-04-28 20:10:44 ADT Last Updated: 2014-01-13	Richard Tervo [ tervo@unb.ca ]	Back to the course homepage...