
	ECE4253 Digital Communications

	Department of Electrical and Computer Engineering - University of New Brunswick, Fredericton, NB, Canada

Linear Recursive Sequence Generator

Shift registers with feedback essentially divide polynomials to create distinctive binary sequences.

This online tool draws and analyzes digital circuits which generate Linear Recursive Sequences (LRS) based on a defining polynomial P(x). The circuit shown below is traced through all possible states. Maximum length sequences are identified. The autocorrelation of each sequence can also be checked (maximum 1023 bits).

Fibonacci Implementation

alternate configuration Fibonacci

Circuit based on P(x) = x⁸+x⁶+x⁵+x⁴+1

The circuit taps correspond to P(x) = (101110001).

Taps: (101110001) (prime)

Sequence #1 (Starting with 0)

States: 0 0 forever...

Sequence #2 (Starting with 1)

States: 1 128 64 160 208 104 52 26 141 198 227 241 120 188 94 47 23 11 133 194 225 240 248 252 254 255 127 63 159 79 39 19 9 132 66 161 80 40 148 202 229 242 249 124 190 95 175 87 171 85 170 213 234 117 58 29 14 7 131 193 96 48 24 140 70 163 81 168 212 106 53 154 205 102 51 153 76 166 211 233 244 250 253 126 191 223 239 247 123 61 158 207 103 179 217 236 118 187 221 238 119 59 157 78 167 83 169 84 42 149 74 165 82 41 20 138 69 34 145 72 164 210 105 180 90 45 22 139 197 98 49 152 204 230 115 57 156 206 231 243 121 60 30 143 199 99 177 216 108 54 27 13 134 67 33 16 136 68 162 209 232 116 186 93 174 215 235 245 122 189 222 111 183 219 237 246 251 125 62 31 15 135 195 97 176 88 44 150 203 101 178 89 172 214 107 181 218 109 182 91 173 86 43 21 10 5 130 65 32 144 200 228 114 185 220 110 55 155 77 38 147 73 36 146 201 100 50 25 12 6 3 129 192 224 112 184 92 46 151 75 37 18 137 196 226 113 56 28 142 71 35 17 8 4 2 1

Period = 255 (Maximum Length Sequence) (autocorrelation)
Output =
1000000010110001111010000111111110010000101001111101010101110000
0110001010110011001011111101111001101110111001010100101000100101
1010001100111001111000110110000100010111010111101101111100001101
001101011011010100000100111011001001001100000011101001000111000...

See a detailed analysis and State Table for this circuit.

Specify the taps for your sequence

Modulo 2 addition is shown schematically equivalent to Exclusive-OR gates.


2024-04-28 16:22:21 ADT Last Updated: 2014-01-13	Richard Tervo [ tervo@unb.ca ]	Back to the course homepage...