
	ECE4253 Digital Communications

	Department of Electrical and Computer Engineering - University of New Brunswick, Fredericton, NB, Canada

Linear Recursive Sequence Generator

Shift registers with feedback essentially divide polynomials to create distinctive binary sequences.

This online tool draws and analyzes digital circuits which generate Linear Recursive Sequences (LRS) based on a defining polynomial P(x). The circuit shown below is traced through all possible states. Maximum length sequences are identified. The autocorrelation of each sequence can also be checked (maximum 1023 bits).

Fibonacci Implementation

alternate configuration Fibonacci

Circuit based on P(x) = x⁸+x⁶+x⁵+x³+1

The circuit taps correspond to P(x) = (101101001).

Taps: (101101001) (prime)

Sequence #1 (Starting with 0)

States: 0 0 forever...

Sequence #2 (Starting with 1)

States: 1 128 64 160 208 232 244 122 189 222 111 55 27 13 6 3 129 192 224 112 56 28 142 199 99 177 88 44 22 11 5 130 65 32 144 72 36 146 73 164 210 233 116 58 29 14 135 195 97 176 216 108 182 219 237 118 59 157 78 39 19 137 68 162 209 104 180 218 109 54 155 77 166 211 105 52 154 205 230 115 185 220 110 183 91 173 214 235 117 186 93 174 87 43 149 202 101 178 217 236 246 123 61 158 207 231 243 249 124 190 95 175 215 107 53 26 141 70 163 81 40 20 10 133 194 225 240 120 188 94 47 151 203 229 242 121 60 30 143 71 35 17 136 196 226 113 184 92 46 23 139 69 34 145 200 100 50 153 76 38 147 201 228 114 57 156 206 103 179 89 172 86 171 213 106 181 90 45 150 75 165 82 169 212 234 245 250 253 126 191 223 239 119 187 221 238 247 251 125 62 31 15 7 131 193 96 48 152 204 102 51 25 12 134 67 33 16 8 132 66 161 80 168 84 170 85 42 21 138 197 98 49 24 140 198 227 241 248 252 254 255 127 63 159 79 167 83 41 148 74 37 18 9 4 2 1

Period = 255 (Maximum Length Sequence) (autocorrelation)
Output =
1000000010111101100000011100011010000010010010111000011011011100
1000101101100101100111011010111010100110111100111110101100010100
0011110100111100010001110100010011001001110011010101101001010111
111011101111100000110011000010000101010100011000111111110010100...

See a detailed analysis and State Table for this circuit.

Specify the taps for your sequence

Modulo 2 addition is shown schematically equivalent to Exclusive-OR gates.


2024-04-28 19:38:41 ADT Last Updated: 2014-01-13	Richard Tervo [ tervo@unb.ca ]	Back to the course homepage...