
	ECE4253 Digital Communications

	Department of Electrical and Computer Engineering - University of New Brunswick, Fredericton, NB, Canada

Linear Recursive Sequence Generator

Shift registers with feedback essentially divide polynomials to create distinctive binary sequences.

This online tool draws and analyzes digital circuits which generate Linear Recursive Sequences (LRS) based on a defining polynomial P(x). The circuit shown below is traced through all possible states. Maximum length sequences are identified. The autocorrelation of each sequence can also be checked (maximum 1023 bits).

Fibonacci Implementation

alternate configuration Fibonacci

Circuit based on P(x) = x⁸+x⁶+x⁵+x+1

The circuit taps correspond to P(x) = (101100011).

Taps: (101100011) (prime)

Sequence #1 (Starting with 0)

States: 0 0 forever...

Sequence #2 (Starting with 1)

States: 1 128 64 160 208 232 116 58 29 142 199 227 113 184 220 238 247 123 61 30 143 71 163 209 104 52 154 205 102 179 217 108 54 27 13 134 195 225 240 120 60 158 207 231 115 57 28 14 135 67 161 80 168 212 234 245 250 253 254 255 127 63 159 79 167 211 233 244 122 189 94 47 151 75 165 82 41 20 10 133 194 97 176 216 236 118 187 221 110 183 219 237 246 251 125 190 95 175 215 235 117 186 93 46 23 11 5 130 193 96 48 152 76 166 83 169 84 170 85 42 21 138 197 98 177 88 172 214 107 53 26 141 198 99 49 24 12 6 131 65 32 144 72 164 210 105 180 218 109 182 91 173 86 43 149 202 101 178 89 44 150 203 229 242 249 252 126 191 223 239 119 59 157 206 103 51 153 204 230 243 121 188 222 111 55 155 77 38 19 9 132 66 33 16 8 4 2 129 192 224 112 56 156 78 39 147 73 36 146 201 100 50 25 140 70 35 145 200 228 114 185 92 174 87 171 213 106 181 90 45 22 139 69 34 17 136 68 162 81 40 148 74 37 18 137 196 226 241 248 124 62 31 15 7 3 1

Period = 255 (Maximum Length Sequence) (autocorrelation)
Output =
1000000010111000111011110001011001101100001111001110000101011111
1110010111101001010000110111011011111010111010000011001010101000
1101011000110000010010110110101001101001111110111001100111101100
100001000000111001001001100010011101010110100010001010010001111...

See a detailed analysis and State Table for this circuit.

Specify the taps for your sequence

Modulo 2 addition is shown schematically equivalent to Exclusive-OR gates.


2024-04-28 19:14:00 ADT Last Updated: 2014-01-13	Richard Tervo [ tervo@unb.ca ]	Back to the course homepage...