
	ECE4253 Digital Communications

	Department of Electrical and Computer Engineering - University of New Brunswick, Fredericton, NB, Canada

Linear Recursive Sequence Generator

Shift registers with feedback essentially divide polynomials to create distinctive binary sequences.

This online tool draws and analyzes digital circuits which generate Linear Recursive Sequences (LRS) based on a defining polynomial P(x). The circuit shown below is traced through all possible states. Maximum length sequences are identified. The autocorrelation of each sequence can also be checked (maximum 1023 bits).

Fibonacci Implementation

alternate configuration Fibonacci

Circuit based on P(x) = x⁸+x⁶+x³+x²+1

The circuit taps correspond to P(x) = (101001101).

Taps: (101001101) (prime)

Sequence #1 (Starting with 0)

States: 0 0 forever...

Sequence #2 (Starting with 1)

States: 1 128 64 160 80 168 212 106 53 26 141 198 99 49 152 204 230 115 57 28 14 7 3 129 192 224 240 248 124 190 95 47 151 75 165 82 169 84 42 149 74 37 18 9 4 130 65 32 16 8 132 194 225 112 184 220 238 247 251 253 126 191 223 111 55 27 13 134 195 97 48 24 140 70 35 145 200 100 50 25 12 6 131 193 96 176 88 44 22 139 69 162 81 40 148 202 101 178 89 172 86 43 21 10 133 66 161 208 232 116 58 157 206 231 243 121 188 94 175 215 235 245 250 125 62 31 143 199 227 113 56 156 78 167 83 41 20 138 197 226 241 120 60 30 15 135 67 33 144 72 36 146 73 164 210 233 244 122 61 158 79 39 19 137 68 34 17 136 196 98 177 216 108 182 219 237 118 59 29 142 71 163 209 104 52 154 205 102 51 153 76 166 211 105 180 218 109 54 155 77 38 147 201 228 114 185 92 174 87 171 85 170 213 234 117 186 221 110 183 91 173 214 107 181 90 45 150 203 229 242 249 252 254 255 127 63 159 207 103 179 217 236 246 123 189 222 239 119 187 93 46 23 11 5 2 1

Period = 255 (Maximum Length Sequence) (autocorrelation)
Output =
1000000010101100011001110000001111101001010100100000100001110111
1110110000110001001100000110100010100110101000010111001111010111
1100011100101000111100001001001011110010001000110110111000101100
110010110110010011101010101110110101101001111111100110111101110...

See a detailed analysis and State Table for this circuit.

Specify the taps for your sequence

Modulo 2 addition is shown schematically equivalent to Exclusive-OR gates.


2024-04-29 01:41:27 ADT Last Updated: 2014-01-13	Richard Tervo [ tervo@unb.ca ]	Back to the course homepage...