
	ECE4253 Digital Communications

	Department of Electrical and Computer Engineering - University of New Brunswick, Fredericton, NB, Canada

Linear Recursive Sequence Generator

Shift registers with feedback essentially divide polynomials to create distinctive binary sequences.

This online tool draws and analyzes digital circuits which generate Linear Recursive Sequences (LRS) based on a defining polynomial P(x). The circuit shown below is traced through all possible states. Maximum length sequences are identified. The autocorrelation of each sequence can also be checked (maximum 1023 bits).

Fibonacci Implementation

alternate configuration Fibonacci

Circuit based on P(x) = x⁸+x⁴+x³+x²+1

The circuit taps correspond to P(x) = (100011101).

Taps: (100011101) (prime)

Sequence #1 (Starting with 0)

States: 0 0 forever...

Sequence #2 (Starting with 1)

States: 1 128 64 32 16 136 196 226 113 56 28 142 71 35 145 72 164 210 233 116 58 29 14 7 3 129 192 96 48 152 76 38 147 73 36 146 201 100 178 217 236 118 59 157 78 39 19 9 4 130 65 160 80 168 212 106 181 218 109 182 91 173 214 107 53 154 77 166 211 105 52 26 13 134 195 225 240 248 124 190 223 111 183 219 237 246 123 189 94 175 215 235 117 186 93 46 23 139 69 34 17 8 132 194 97 176 216 108 54 27 141 198 227 241 120 60 158 207 231 115 57 156 206 103 51 25 140 70 163 209 104 180 90 45 150 75 37 18 137 68 162 81 40 148 74 165 82 169 84 42 149 202 229 114 185 220 238 119 187 221 110 55 155 205 230 243 121 188 222 239 247 251 253 126 191 95 47 151 203 101 50 153 204 102 179 89 172 86 43 21 138 197 98 49 24 12 6 131 193 224 112 184 92 174 87 171 85 170 213 234 245 250 125 62 159 79 167 83 41 20 10 133 66 33 144 200 228 242 249 252 254 255 127 63 31 15 135 67 161 208 232 244 122 61 30 143 199 99 177 88 44 22 11 5 2 1

Period = 255 (Maximum Length Sequence) (autocorrelation)
Output =
1000000010001110001001011100000011001001001101110010000010101101
1010110010110000111110110111101011101000100001101100011110011100
1100010110100100010100101010011101110110011110111111010011001101
010001100000111010101011111001010000100111111110000101111000110...

See a detailed analysis and State Table for this circuit.

Specify the taps for your sequence

Modulo 2 addition is shown schematically equivalent to Exclusive-OR gates.


2024-04-29 01:01:25 ADT Last Updated: 2014-01-13	Richard Tervo [ tervo@unb.ca ]	Back to the course homepage...